dorsaVi Commences Silicon Fabrication of First RRAM-CMOS Validation Chip

dorsaVi (ASX: DVL) has commenced physical manufacturing of its first resistive random-access memory (RRAM)-complementary metal-oxide-semiconductor (CMOS) validation chip, moving the program from completed design and manufacturing preparation into an active silicon wafer run.

dorsaVi confirmed the manufacturing data package has passed foundry intake, with the wafer lot committed to fabrication and processing now underway on the front-end CMOS base.

The current run will produce the transistor and circuit-level structures needed to support the RRAM memory array, peripheral circuits, and evaluation features before the RRAM-specific layers are added.

The milestone advances the company towards silicon-level electrical testing and performance benchmarking while generating manufacturing knowledge intended to inform and de-risk a subsequent 22-nanometre (nm) implementation.

Target applications identified by the company include smart exoskeletons and electromyography sensor nodes, robotic joint controllers, drones and self-guided vehicles, and always-on Internet of Things edge sensors.

Silicon Moves into Production

Foundry acceptance means dorsaVi’s design files, mask data, process documentation, and wafer-lot instructions met the intake requirements needed for the validation chip to enter the fabrication sequence.

The CMOS base now being produced will provide the foundation for later back-end-of-line preparation, RRAM stack integration, and formation of the integrated memory cells and arrays.

Once the base is complete, the wafers are expected to move into partner-led processing and integration before electrical testing and characterisation assess how the completed architecture performs.

dorsaVi is using a staged manufacturing approach so each step can provide process learning, allow progress to be assessed before the next stage, and reduce technical and execution risk.

The current 180nm validation run will look to generate silicon-level learning that can inform and de-risk the broader 22nm RRAM program.

Commercial Pathway Building

dorsaVi is developing the RRAM platform as local, low-power memory infrastructure for the physical AI market, where systems process information and make decisions on-device rather than relying on cloud connectivity.

The program targets speed, energy efficiency, endurance, and non-volatility as characteristics needed for these systems to make decisions locally while reducing the latency and energy associated with moving data between memory and processing.

Manufacturing the validation chip gives dorsaVi physical silicon that can ultimately be tested and demonstrated to prospective partners and customers, with successful validation intended to support future supply, partnering, and licencing discussions.

Our 22-nm RRAM Program with NTU and ITRI is designed to address that constraint by bringing memory and compute closer together,” group chief executive officer Mathew Regan said.

“We intend to prove this memory architecture through our own sensing platform and then, subject to successful validation, commercialise it for the wider physical AI market.”